(China (Mainland))
Product Summary
The 74HC4060AP is a high-speed Si-gate CMOS device and is pin compatible with the HEF4060. The 74HC4060AP is a14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator 74HC4060AP may be replaced by an external clock signal at input RS. In this case keep the other oscillator pins (RTC and CTC) floating. The counter 74HC4060D advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of other input conditions. In the HCT version, the MR input is TTL compatible, but the RS input has CMOS input switching levels and can be driven by a TTL output by using a pull-up resistor to VCC.
Parametrics
74HC4060AP absolute maximum ratings: (1)VCC, supply voltage: -0.5 to +7 V; (2)IIK, input clamping current, VI < -0.5 V or VI > VCC + 0.5 V: ±20 mA max; (3)IOK, output clamping current, VO < -0.5 V or VO > VCC + 0.5 V: ±20 mA max; (4)IO, output current, -0.5 V < VO < VCC + 0.5 V: ±25 mA max; (5)ICC, supply current: 50 mA max; (6)IGND, ground current: -50mA max; (7)Tstg, storage temperature: -65 to +150 ℃.
Features
74HC4060AP features: (1)All active components ochip; (2)RC or crystal oscillator configuration; (3)Complies with JEDEC standard no. 7 A; (4)ESD protection: HBM JESD22-A114E exceeds 2000 V; MM JESD22-A115-A exceeds 200 V; (5)Multiple package options; (6)Specified from -40 ℃ to +85 ℃ and from -40 ℃ to +125 ℃.
Diagrams
