Product Summary
The AML6210DP is a complete system-on-chip built around the AML6210DP ARM Thumb processor with an extended DSP instruction set and Jazelle Java accelerator. The AML6210DP achieves 210 MIPS at 190 MHz. The AML6210DP is an optimized host processor for applications with an LCD display. Its integrated LCD controller supports BW and up to 16M color, active and passive LCD displays. The 160Kbyte integrated SRAM can be configured as a frame buffer minimizing the impact for LCD refresh on the overall processor performance. The External Bus Interface incorporates controllers for synchronous DRAM (SDRAM) and Static memories and features specific interface circuitry for Compact Flash and NAND Flash.
Parametrics
AML6210DP absolute maximum ratings: (1)Operating Temperature (Industrial): -40 to +125℃; (2)Storage Temperature: -60 to +150℃; (3)Voltage on Input Pins with Respect to Ground: -0.3V to +4.0V; (4) Maximum Operating Voltage(VDDCORE and VDDBU): 1.5V; (5)Maximum Operating Voltage (VDDOSC, VDDPLL, VDDIOM and VDDIOP): 4.0V; (6)Total DC Output Current on all I/O lines: 350mA.
Features
AML6210DP features: (1)Additional Embedded Memories; (2)External Bus Interface (EBI); (3)LCD Controller; (4)USB; (5)Bus Matrix; (6)Fully Featured System Controller (SYSC) for Efficient System Management, including; (7)Reset Controller (RSTC); (8)Shutdown Controller (SHDWC); (9)Clock Generator (CKGR); (10)Power Management Controller (PMC); (11)Advanced Interrupt Controller (AIC); (12)Debug Unit (DBGU); (13)Periodic Interval Timer (PIT); (14)Watchdog Timer (WDT); (15)Real-Time Timer (RTT); (16)Three 32-bit Parallel Input/Output Controllers (PIO) PIOA, PIOB and PIOC; (17)Nineteen Peripheral DMA (PDC) Channels; (18)MultiMedia Card Interface (MCI); (19)Two-wire Interface (TWI).
Diagrams
AML61BA1E |
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AML61BA1G |
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AML61BA1U |
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AML61BA2A |
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AML61BA2U |
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AML61BA3D |
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