Product Summary
The CY23EP05SXC-1T is a 2.5V or 3.3V zero delay buffer designed to distribute low-jitter high-speed clocks and is available in a
8-pin SOIC package. The CY23EP05SXC-1T accepts one reference input, and drives out five low-skew clocks. The -1H version operates up to 220 (200) MHz frequencies at 3.3V (2.5V), and has a higher drive strength than the -1 devices. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.
Parametrics
CY23EP05SXC-1T absolute maximum ratings: (1)Supply Voltage to Ground Potential: -0.5V to 4.6V; (2)DC Input Voltage: VSS -0.5V to 4.6V; (3)Storage Temperature: -65℃ to 150℃; (4)Junction Temperature: 150℃; (5)Static Discharge Voltage (per MIL-STD-883, Method 3015: > 2000V.
Features
CY23EP05SXC-1T features: (1)10 MHz to 220 MHz maximum operating range; (2)Zero input-output propagation delay, adjustable by loading on CLKOUT pin; (3)Multiple low-skew outputs; (4)30 ps typical output-output skew; (5)One input drives five outputs; (6)22 ps typical cycle-to-cycle jitter; (7)13 ps typical period jitter; (8)Standard and High drive strength options; (9)Available in space-saving 150-mil SOIC package; (10)3.3V or 2.5V operation; (11)Industrial temperature available.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||
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CY23EP05SXC-1T |
Cypress Semiconductor |
Phase Locked Loops (PLL) 3.3VZDB COM |
Data Sheet |
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Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||
CY2300 |
Other |
Data Sheet |
Negotiable |
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CY2300SXC |
Cypress Semiconductor |
Phase Locked Loops (PLL) 3.3VZDB COM |
Data Sheet |
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CY2300SXCT |
Cypress Semiconductor |
Phase Locked Loops (PLL) 3.3VZDB COM |
Data Sheet |
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CY2302 |
Other |
Data Sheet |
Negotiable |
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CY23020-1 |
Other |
Data Sheet |
Negotiable |
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CY23020LFI-3 |
Cypress Semiconductor |
Phase Locked Loops (PLL) 400MHz IND Zero Delay Buffer |
Data Sheet |
Negotiable |
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