Product Summary

The EDS1232AASE-60-E is a 128M bits SDRAM. The EDS1232AASE-60-E is organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. It is packaged in 90-ball FBGA (μBGA).

Parametrics

EDS1232AASE-60-E absolute maximum ratings: (1)Voltage on any pin relative to VSS VT: –0.5 to +4.6 V; (2)Supply voltage relative to VSS VDD, VDDQ: –0.5 to +4.6 V; (3)Short circuit output current IOS: 50 mA; (4)Power dissipation PD: 1.0 W; (5)Operating ambient temperature TA: 0 to +70 °C; (6)Storage temperature Tstg: –55 to +125 °C.

Features

EDS1232AASE-60-E features: (1) 3.3V power supply; (2) Clock frequency: 166MHz (max.); (3) Single pulsed /RAS; (4) ×32 organization; (5) 4 banks can operate simultaneously and independently; (6) Burst read/write operation and burst read/single write operation capability; (7) Programmable burst length (BL): 1, 2, 4, 8 and full page; (8) 2 variations of burst sequence: Sequential (BL = 1, 2, 4, 8, full page), Interleave (BL = 1, 2, 4, 8); (9) Programmable /CAS latency (CL): 2, 3; (10) Byte control by DQM; (11) Refresh cycles: 4096 refresh cycles/64ms; (12) 2 variations of refresh: Auto refresh, Self refresh; (13) FBGA(μBGA)package with lead free solder (Sn-Ag-Cu).

Diagrams

 EDS1232AASE-60-E block diagram