(China (Mainland))
Product Summary
The EP1K100QI208-3 is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. The core of an enhanced configuration device is divided into two major blocks: a configuration controller and a flash memory. The EP1K100QI208-3 is used to store configuration data for systems made up of one or more Altera FPGAs. Unused portions of the flash memory can be used to store processor code or data that can be accessed via the external flash interface after FPGA configuration is complete.
Parametrics
EP1K100QI208-3 absolute maximum ratings: (1)Supply voltage With respect to ground:-0.2V to 4.6V; (2)DC input voltage With respect to ground:-0.5V to 3.6V; (3)DC VCC or ground current:100mA; (4)DC output current, per pin: -25mA to 25mA; (5)Power dissipation:360mW; (6)Storage temperature No bias:-65℃ to 150℃; (7)Ambient temperature Under bias:-65℃ to 135℃; (8)Junction temperature Under bias:135℃.
Features
EP1K100QI208-3 features: (1)Supports ISP via Jam Standard Test and Programming Language(STAPL); (2)Supports JTAG boundary scan; (3)nINIT_CONF pin allows private JTAG instruction to start FPGA configuration; (4)Internal pull-up resistor on nINIT_CONF always enabled; (5)User programmable weak internal pull-up resistors on nCS and OE pins; (6)Internal weak pull-up resistors on external flash interface address and control lines, bus hold on data lines; (7)Standby mode with reduced power consumption; (8)Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs; (9)Pin-selectable 2-ms or 100-ms power-on reset (POR) time ; (10)Configuration clock supports programmable input source and frequency synthesis.
Diagrams
