(China (Mainland))
Product Summary
The K4H511638D-UCCC is 536,870,912 bits of double data rate synchronous DRAM organized as 4x8,388,608 words by 8/16bits, fabricated with SAMSUNGs high performance CMOS technology. The K4H511638D-UCCC features with Data Strobe allow extremely high performance up to 400Mb/s per pin. Range of operating frequencies, programmable burst length and programmable latencies allow theK4H511638D-UCCC to be useful for a variety of high performance memory systems applicatios.
Parametrics
K4H511638D-UCCC absolute maximum ratings: (1) Voltage on any pin: -0.5 to 3.6V; (2) Voltage on VDD & VDDQ supply relative to VSS VDD, VDDQ: -1.0 to 3.6V; (3) Storage temperature Tstg: -55 to +150°C; (4) Short circuit current Ios: 50mA.
Features
K4H511638D-UCCC features: (1) VDD 2.5V ±0.2V, VDDQ 2.5V±0.3V for DDR255,333; (2) VDD 2.6V±0.1V, VDDQ 2.6V±0.1V for DDR400; (3) Double-data-rate architecture; two data transfers per clock cycle; (4) All inputs except data & DM are sampled at the positive going edge of the system clock(CK) ; (5) Data IO transactions on both edges of data strobe; (6) Edge aligned data output, center aligned data input; (7) LDM,UDM for write masking only (x16) ; (8) DM for write masking only (x4, x8) .
Diagrams
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 K4H511638D-UCCC |
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Negotiable |
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K4H510438B-G(Z)C/LA2 |
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Negotiable |
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K4H510438B-G(Z)C/LB0 |
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Negotiable |
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K4H510438B-G(Z)C/LB3 |
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Negotiable |
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K4H510438B-G(Z)C/LCC |
Other |
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Negotiable |
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K4H510438C-UCA2 |
Other |
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Negotiable |
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K4H510638E-LA2 |
Other |
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Data Sheet |
Negotiable |
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