(China (Mainland))
Product Summary
The LC4256V75FTN256B-10I is an In-System Programmable SuperFAST High Density PLD. The LC4256V75FTN256B-10I combines high speed and low power with the flexibility needed for ease of design. With its robust Global Routing Pool and Output Routing Pool, this device delivers excellent First-Time-Fit, timing predictability, routing, pin-out retention and density migration. The LC4256V75FTN256B-10I offers densities ranging from 32 to 512 macrocells.
Parametrics
LC4256V75FTN256B-10I absolute maximum ratings: (1)Supply Voltage (VCC): -0.5V to 5.5V; (2)Output Supply Voltage (VCCO): -0.5V to 4.5V; (3)Input or I/O Tristate Voltage Applied4, 5: -0.5V to 5.5V; (4)Storage Temperature: -65℃ to 150℃; (5)Junction Temperature with Power Applied: -55℃ to 150℃.
Features
LC4256V75FTN256B-10I features: (1)fMAX = 400MHz maximum operating frequency; (2)tPD = 2.5ns propagation delay; (3)Up to four global clock pins with programmable clock polarity control; (4)Up to 80 PTs per output; (5)Up to four global OE controls; (6)Individual local OE control per I/O pin; (7)Excellent First-Time-Fit TM and refit; (8)Fast path, SpeedLockingTM Path, and wide-PT path; (9)5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces; (10)Hot-socketing; (11)Open-drain capability; (12)Input pull-up, pull-down or bus-keeper; (13)Programmable output slew rate; (14)3.3V PCI compatible; (15)IEEE 1149.1 boundary scan testable; (16)3.3V/2.5V/1.8V In-System Programmable.
Diagrams
