Product Summary

The MT48lc16m16a2-75 is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quadbank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4 is 67,108,864-bit banks is organized as 8,192 rows by 2,048 columns by 4 bits.

Parametrics

MT48lc16m16a2-75 absolute maximum ratings: (1)Voltage on VDD, VDDQ Supply: -1V to +4.6V; (2)Voltage on Inputs, NC or I/O Pins: -1V to +4.6V; (3)Operating Temperature: 0°C to +70°C; (4)Operating Temperature: -40°C to +85°C.

Features

MT48lc16m16a2-75 features: (1)PC66-, PC100-, and PC133-compliant; (2)Fully synchronous; all signals registered on positive edge of system clock; (3)Internal pipelined operation; column address can be changed every clock cycle; (4)Internal banks for hiding row access/precharge; (5)Programmable burst lengths: 1, 2, 4, 8, or full page; (6)Auto Precharge, includes CONCURRENT AUTO PRECHARGE, and Auto Refresh Modes.

Diagrams

MT48lc16m16a2-75 block diagram

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