(China (Mainland))
Product Summary
The M12L16161A is a 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.
Parametrics
M12L16161A absolute maximum ratings: (1)Voltage on any pin relative to VSS VIN,VOUT: -1.0 ~ 4.6 V; (2)Voltage on VDD supply relative to VSS VDD,VDDQ: -1.0 ~ 4.6 V; (3)Storage temperature TSTG: -55 ~ + 150 °C; (4)Power dissipation PD: 1 W; (5)Short circuit current IOS: 50 MA.
Features
M12L16161A features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Dual banks operation; (4)MRS cycle with address key programs; (5)Burst Read Single-bit Write operation; (6)DQM for masking; (7)Auto & self refresh; (8)32ms refresh period (2K cycle).
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||
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 M12L16161A |
Other |
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Data Sheet |
Negotiable |
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M12L16161A-5TG |
Other |
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Data Sheet |
Negotiable |
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M12L16161A-5TIG |
Other |
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Data Sheet |
Negotiable |
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M12L16161A-7BG |
Other |
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Data Sheet |
Negotiable |
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M12L16161A-7BIG |
Other |
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Data Sheet |
Negotiable |
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M12L16161A-7TG |
Other |
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Data Sheet |
Negotiable |
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M12L16161A-7TIG |
Other |
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Data Sheet |
Negotiable |
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