(China (Mainland))
Product Summary
The TMS320TCI6482ZTZ is a Communications Infrastructure Digital Signal Processor. The TMS320TCI6482ZTZ is the highest-performance fixed-point DSP generation in the TMS320C6000. DSP platform. The TMS320TCI6482ZTZ is based on the third-generation high-performance, advanced VelociTI. very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making the DSP an excellent choice for applications including video and telecom infrastructure, imaging/medical, and wireless infrastructure (WI).
Parametrics
TMS320TCI6482ZTZ absolute maximum ratings: (1)CVDD: -0.5 V to 1.5 V; (2)DVDD33: -0.5 V to 4.2 V; (3)DVDDR, DVDD18, AVDLL1, AVDLL2: -0.5 V to 2.5 V; (4)DVDD15: -0.5 V to 2.5 V; (5)DVDD12, DVDDRM, AVDDT, AVDDA: -0.5 V to 1.5 V; (6)PLLV1, PLLV2: -0.5 V to 2.5 V; (7)Operating case temperature range, TC: (default): 0℃ to 90℃; (8)(A version) [A-1000 device]: -40℃ to 105℃; (9)Storage temperature range, Tstg: -65℃ to 150℃.
Features
TMS320TCI6482ZTZ features: (1)High-Performance Fixed-Point DSP (TCI6482), 1.17- and 1-ns Instruction Cycle Time, 850-MHz and 1-GHz Clock Rate, Eight 32-Bit Instructions/Cycle, 8000 MIPS/MMACS (16-Bits), Commercial Temperature [0℃ to 90℃], Extended Temperature [-40℃ to 105℃]; (2)TMS320C64x+. DSP Core, Dedicated SPLOOP Instruction, Compact Instructions (16-Bit), Instruction Set Enhancements, Exception Handling; (3)TMS320C64x+ Megamodule L1/L2 Memory Architecture: 256K-Bit (32K-Byte) L1P Program Cache, 256K-Bit (32K-Byte) L1D Data Cache, 16M-Bit (2096K-Byte) L2 Unified Mapped RAM/Cache, 256K-Bit (32K-Byte) L2 ROM, Time Stamp Counter; (4)2 RSAs for CDMA Processing, Dedicated RAKE, PATH_SEARCH and RACH_SEARCH Instructions, Transmit Processing Capability; (5)Enhanced VCP2, Supports Over 694 7.95-Kbps AMR, Programmable Code Parameters.
Diagrams
