Product Summary

The K4B2G0846D-HCH9 is a 2Gb D-die DDR3 SDRAM organized as a 64Mbit x 4 I/Os x 8banks, 32Mbit x 8 I/Os x 8banks device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1600Mb/sec/pin (DDR3-1600) for general applications. The K4B2G0846D-HCH9 is designed to comply with the following key DDR3 SDRAM features such as posted CAS, Programmable CWL, Internal (Self) Calibration, On Die Termination using ODT pin and Asynchronous Reset.

Parametrics

K4B2G0846D-HCH9 absolute maximum ratings: (1)VDD Voltage on VDD pin relative to Vss: -0.4 V ~ 1.975V; (2)VDDQ Voltage on VDDQ pin relative to Vss: -0.4 V ~ 1.975V; (3)VIN, VOUT Voltage on any pin relative to Vss: -0.4 V ~ 1.975V; (4)TSTG Storage Temperature: -55 to +100℃.

Features

K4B2G0846D-HCH9 features: (1)JEDEC standard 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V); (2)VDDQ = 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V); (3)400 MHz fCK for 800Mb/sec/pin, 533MHz fCK for 1066Mb/sec/pin, 667MHz fCK for 1333Mb/sec/pin, 800MHz fCK for 1600Mb/sec/pin; (4)8 Banks; (5)Programmable CAS Latency(posted CAS): 5,6,7,8,9,10,11; (6)Programmable Additive Latency: 0, CL-2 or CL-1 clock; (7)Programmable CAS Write Latency (CWL) = 5(DDR3-800), 6(DDR3-1066), 7(DDR3-1333) and 8(DDR3-1600); (8)8-bit pre-fetch; (9)Burst Length: 8 (Interleave without any limit, sequential with starting address 000 only), 4 with tCCD = 4 which does not allow seamless read or write [either On the fly using A12 or MRS]; (10)Bi-directional Differential Data-Strobe; (11)Internal(self) calibration: Internal self calibration through ZQ pin (RZQ: 240 ohm ±1%); (12)On Die Termination using ODT pin; (13)Average Refresh Period 7.8us at lower than TCASE 85℃, 3.9us at; (14)85℃ < TCASE < 95℃; (15)Asynchronous Reset; (16)Package: 78 balls FBGA - x4/x8; (17)All of Lead-Free products are compliant for RoHS; (18)All of products are Halogen-free.

Diagrams

K4B2G0846D-HCH9 block diagram