Product Summary

The K4S560838N-LCCC is a 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 8,392,608 words by 8bits, fabricated with SAMSUNG high performance CMOS technology. Synchronous design of the K4S560838N-LCCC allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.

Parametrics

K4S560838N-LCCC absolute maximum ratings: (1)Voltage on any pin relative to Vss: -1.0 ~ 4.6 V; (2)Voltage on VDD supply relative to Vss: -1.0 ~ 4.6 V; (3)Storage temperature: -55 ~ +150 ℃; (4)Power dissipation: 1 W; (5)Short circuit current: 50 mA.

Features

K4S560838N-LCCC features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Four banks operation; (4)MRS cycle with address key programs; (5)All inputs are sampled at the positive going edge of the system; (6)clock; (7)Burst read single-bit write operation; (8)DQM for masking; (9)Auto and self refresh; (10)64ms refresh period (8K Cycle).

Diagrams

K4S560838N-LCCC block diagram