Product Summary

The EDE1108AEBG-8E-F is 1G bits DDR2 SDRAM.The high-speed data transfer of the EDE1108AEBG-8E-F is realized by the 4 bits prefetch pipelined architecture.

Parametrics

EDE1108AEBG-8E-F absolute maximum ratings: (1) Power supply voltage VDD: -1.0 to +2.3V; (2) Power supply voltage for output VDDQ: -0.5V to +2.3V; (3) Input voltage VIN: -0.5V to +2.3V; (4) Output voltage Vout: -0.5V to +2.3V; (5) Storage temperature Tstg: -55°C to 100°C; (6) Power dissipation PD: 1.0W; (7) Short circuit output current IOUT: 50mA.

Features

EDE1108AEBG-8E-F features: (1) Double-data-rate architecture; two data transfers per clock cycle; (2) The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture; (3) Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data atthe receiver; (4) Differential clock inputs (CK and /CK); (5) Posted /CAS by programmable additive latency for better command and data bus efficiency ; (6) /DQS, (/RDQS) can be disabled for single-ended Data Strobe operation.

Diagrams

EDE1108AEBG-8E-F Pin Configuration