Product Summary

The H5PS1G63EFR-S6C is a 1Gb DDR2 SDRAM. All outputs and inputs of the H5PS1G63EFR-S6C are compatible with SSTL_18 interface. All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock. SOurce synchronous-data transaction of the H5PS1G63EFR-S6C us aligned to bidirectional data strobe (DQS) .

Parametrics

H5PS1G63EFR-S6C absolute maximum ratings: (1) Voltage on VDD pin relative to VSS VDD: -1.0V to 2.3V; (2) Voltage on VDDQ pin relative VSS VDDQ: -0.5V to 2.3V; (3) Voltage on VDDL pin relative to VSS VDDL: 0.5V to 2.3V; (4) Voltage on any pin relative to VSS VIN, VOUT: 0.5V to 2.3V; (5) Storage Temperature: -55°C to +100°C; (6) Input leakage current; any input 0V VIN VDD; all other balls not under test=0V) II: -2uA to 2uA; (7) Output leakage current; 0V VOUT VDDQ; DQ and ODT disabled IOZ: -5uA to 5uA.

Features

H5PS1G63EFR-S6C features: (1) VDD=1.8+/-0.1V; (2) VDDQ=1.8+/-0.1V; (3) All inputs and outputs are compatible with SSTL_18 interface; (4) 8 banks; (5) On Die Termination supported; (5) Off Chip Driver Impedance Adjustment supported; (6) Self-Refresh high temperature entry.

Diagrams

H5PS1G63EFR-S6C Circuit