Product Summary

The K4H510838G-HCCC is a 512Mb G-die DDR SDRAM.

Parametrics

K4H510838G-HCCC absolute maximum ratings: (1)Voltage on any pin relative to VSS, VIN, VOUT: -0.5 ~ 3.6 V; (2)Voltage on VDD & VDDQ supply relative to VSS, VDD, VDDQ: -1.0 ~ 3.6 V; (3)Storage temperature, TSTG: -55 ~ +150℃; (4)Short circuit current, IOS: 50 mA.

Features

K4H510838G-HCCC features: (1)VDD: 2.5V ±0.2V, VDDQ: 2.5V ±0.2V for DDR266, 333; (2)VDD: 2.6V ?0.1V, VDDQ: 2.6V ±0.1V for DDR400; (3)Double-data-rate architecture; two data transfers per clock cycle; (4)Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16); (5)Four banks operation; (6)Differential clock inputs(CK and CK); (7)DLL aligns DQ and DQS transition with CK transition; (8)MRS cycle with address key programs, Read latency: DDR266(2.5 Clock), DDR333(2.5 Clock), DDR400(3 Clock); Burst length (2, 4, 8); Burst type (sequential & interleave); (9)All inputs except data & DM are sampled at the positive going edge of the system clock(CK); (10)Data I/O transactions on both edges of data strobe; (11)Edge aligned data output, center aligned data input; (12)LDM,UDM for write masking only (x16); (13)DM for write masking only (x4, x8); (14)Auto & Self refresh; (15)7.8us refresh interval(8K/64ms refresh); (16)Maximum burst refresh cycle: 8; (17)66pin TSOP II Lead-Free & Halogen-Free package; (18)RoHS compliant.

Diagrams

K4H510838G-HCCC block diagram